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Renesas Announces 512 Mbit SuperAND Flash Chip

Renesas Technology announced
the release of the 512 Mbit series of superAND (AG-AND) chips – HN29V512A flash memory, with
peak write speed of about 4 Mb / s – for use in electronics for
consumer sector – mobile phones and digital cameras. Samples
HN29V512A0A, with a 16-bit bus, and HN29V512A1A, with an 8-bit bus, will
ship in Japan from May; the company is currently serially producing 128
and 256 Mbit superAND chips. In the near future the company plans to develop 512
Mbit microcircuits with supply voltage 1.8 in.

As a reminder, in the middle of November last year, Renesas reported
plans to cooperate with Powerchip Semiconductor – Taiwanese manufacturer
memory, according to an official press release from Renesas, will produce just
1 Gbps AG-AND flash memory chips (Assist Gate-AND or AND with auxiliary gate).
This memory is the development of the joint venture itself. Memory cell
of this type is made using insulation technology developed by Renesas
and is a combination of several auxiliary gates preventing
interference inside the cell, and floating gates. This structure allows,
according to the developers, reduce cell size and improve performance.

To nearly double the production of high-density flash memory chips
by autumn 2021, Renesas planned to invest in its subsidiary,
Trenceti Technologies, 307.6 million. dollars. After the implementation of a new investment
plan, the performance of Trecenti Technologies will be 12 thousand. 300mm plates
per month (at the end of December this figure was 9 thousand. plates, moreover, under
AND-flash memory allocated only 3000. plates). In terms of microcircuits
Renesas’ new performance looks like this: 5 million. 1 Gbps AG-AND chips
monthly in the next financial year versus 1.8 million. chips in 2021.

With the right allocation of resources, Renesas will control by 2021
about 20% of the flash memory market – due to the release of 4 Gbit AG-AND chips.

Brief characteristics of microcircuits:

Characteristics
Name
HN29V512A series
HN29V512A0BABP
HN29V512A1ABP
Technical process
0.13 µm
Supply voltage
2.7 ~ 3.6 in
Tire
?16-bit
?8-bit
Access time
The initial
90 µs
Sequential reading
50 ns (min.)
Recording speed
one.2ms / 2KB or 4KB
Housing
95-ball CSP (10 ? eleven.five ?one.2 mm)

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